Continue work on Device config
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mrumel
parent
4851bfc50a
commit
11deae5454
2 changed files with 273 additions and 222 deletions
1
.gitignore
vendored
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.gitignore
vendored
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@ -6,3 +6,4 @@ dist
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__pycache__
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*.egg-info
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_build
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.idea
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@ -1,14 +1,15 @@
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import ctypes
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from enum import Enum
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uint8_t = ctypes.c_uint8
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uint16_t = ctypes.c_uint16
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uint32_t = ctypes.c_uint32
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import spidev
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class TCAN4550:
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def __init__(self, bus: int, device: int) -> None:
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# SPI initialization
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self.spi = spidev.SpiDev(bus, device)
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self.spi.max_speed_hz = 2000000
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@ -16,36 +17,75 @@ class TCAN4550:
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self.spi.mode = 0b00
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self.spi.cshigh = True
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# TCAN device initialization
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# Begin by clearing any potential SPI errors
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self.TCAN_clearSPIerr()
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self.dev_ie = TCAN4550_device_interrupt_enable()
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self.dev_ie = TCAN4x5x_device_interrupt_enable()
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self.dev_ie = 0x0 # Initialize to 0 to all bits are set to 0.
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self.TCAN_configure_interrupt_enable(self.dev_ie) # Disable all non-MCAN related interrupts for simplicity
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self.dev_ir = TCAN4550_device_interrupt()
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self.dev.ir = 0x0 # Setup a new MCAN IR object for easy interrupt checking
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self.TCAN_read_interrupts(self.dev_ir) # Request that the struct be updated with current DEVICE (not MCAN) interrupt values
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self.dev_ir = TCAN4x5x_Device_Interrupts()
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self.dev_ir = 0x0 # Setup a new MCAN IR object for easy interrupt checking
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self.TCAN_read_interrupts(
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self.dev_ir) # Request that the struct be updated with current DEVICE (not MCAN) interrupt values
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if self.dev_ir.b.PWRON:
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self.TCAN4x5x_Device_ClearInterrupts(self.dev_ir)
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# Configure the CAN bus speeds
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self.TCANNomTiming = TCAN4550_MCAN_nominal_timing_simple() # 500k arbitration with a 40 MHz crystal ((40E6 / 2) / (32 + 8) = 500E3)
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self.TCANNomTiming = TCAN4x5x_MCAN_Nominal_Timing_Simple() # 500k arbitration with a 40 MHz crystal ((40E6 / 2) / (32 + 8) = 500E3)
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self.TCANNomTiming = 0x0
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self.TCANNomTiming.NominalBitRatePrescaler = 2
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self.TCANNomTiming.NominalTqBeforeSamplePoint = 32
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self.TCANNomTiming.NominalTqAfterSamplePoint = 8
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self.TCANDataTiming = TCAN4550_MCAN_nominal_timing_simple() # 2 Mbps CAN FD with a 40 MHz crystal (40E6 / (15 + 5) = 2E6)
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self.TCANDataTiming = TCAN4x5x_MCAN_Nominal_Timing_Simple() # 2 Mbps CAN FD with a 40 MHz crystal (40E6 / (15 + 5) = 2E6)
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self.TCANDataTiming = 0x0
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self.TCANDataTiming.DataBitRatePrescaler = 1;
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self.TCANDataTiming.DataTqBeforeSamplePoint = 15;
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self.TCANDataTiming.DataTqAfterSamplePoint = 5;
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self.TCANDataTiming.DataBitRatePrescaler = 1
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self.TCANDataTiming.DataTqBeforeSamplePoint = 15
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self.TCANDataTiming.DataTqAfterSamplePoint = 5
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# Configure the MCAN core settings
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self.cccrConfig = TCAN4x5x_MCAN_CCCR_Config()
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self.cccrConfig = 0x0 # Remember to initialize to 0, or you'll get random garbage!
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self.cccrConfig.b.FDOE = 1 # CAN FD mode enable
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self.cccrConfig.b.BRSE = 1 # CAN FD Bit rate switch enable
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# Configure the default CAN packet filtering settings
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self.gfc = TCAN4x5x_MCAN_Global_Filter_Configuration()
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self.gfc.b.RRFE = 1 # Reject remote frames (TCAN4x5x doesn't support this)
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self.gfc.b.RRFS = 1 # Reject remote frames (TCAN4x5x doesn't support this)
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self.gfc.b.ANFE = TCAN4x5x_GFC_NO_MATCH_BEHAVIOR.TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0.value # Default behavior if incoming message doesn't match a filter is to accept into RXFIO0 for extended ID messages (29 bit IDs)
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self.gfc.b.ANFS = TCAN4x5x_GFC_NO_MATCH_BEHAVIOR.TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0.value # Default behavior if incoming message doesn't match a filter is to accept into RXFIO0 for standard ID messages (11 bit IDs)
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'''
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In the next configuration block, we will set the MCAN core up to have:
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- 1 SID filter element
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- 1 XID Filter element
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- 5 RX FIFO 0 elements
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- RX FIFO 0 supports data payloads up to 64 bytes
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- RX FIFO 1 and RX Buffer will not have any elements, but we still set their data payload sizes, even though it's not required
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- No TX Event FIFOs
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- 2 Transmit buffers supporting up to 64 bytes of data payload
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'''
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self.MRAMConfiguration = TCAN4x5x_MRAM_Config()
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self.MRAMConfiguration = 0x0
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self.MRAMConfiguration.XIDNumElements = 1 # Extended ID number of elements, you MUST have a filter written to MRAM for each element defined
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self.MRAMConfiguration.SIDNumElements = 1 # Standard ID number of elements, you MUST have a filter written to MRAM for each element defined
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self.MRAMConfiguration.Rx0NumElements = 5 # RX0 Number of elements
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self.MRAMConfiguration.Rx0ElementSize = TCAN4x5x_MRAM_Element_Data_Size.MRAM_64_Byte_Data # RX0 data payload size
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self.MRAMConfiguration.Rx1NumElements = 0 # RX1 number of elements
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self.MRAMConfiguration.Rx1ElementSize = TCAN4x5x_MRAM_Element_Data_Size.MRAM_64_Byte_Data # RX1 data payload size
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self.MRAMConfiguration.RxBufNumElements = 0 # RX buffer number of elements
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self.MRAMConfiguration.RxBufElementSize = TCAN4x5x_MRAM_Element_Data_Size.MRAM_64_Byte_Data # RX buffer data payload size
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self.MRAMConfiguration.TxEventFIFONumElements = 0 # TX Event FIFO number of elements
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self.MRAMConfiguration.TxBufferNumElements = 2 # TX buffer number of elements
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self.MRAMConfiguration.TxBufferElementSize = TCAN4x5x_MRAM_Element_Data_Size.MRAM_64_Byte_Data # TX buffer data payload size
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def TCAN4x5x_Device_ClearInterrupts(self, ir):
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pass
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def TCAN_clearSPIerr(self) -> None:
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pass
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@ -54,7 +94,6 @@ class TCAN4550:
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return True
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def TCAN_read_interrupts(self, ir) -> bool:
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return True
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def TCAN_write_32(self, address, data) -> None:
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@ -63,7 +102,6 @@ class TCAN4550:
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def TCAN_write(self, data, address, no_words) -> None:
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pass
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def TCAN_read_32(self, address, data) -> uint32_t:
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return 0
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@ -71,13 +109,12 @@ class TCAN4550:
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return 0
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class TCAN4x5x_GFC_NO_MATCH_BEHAVIOR(Enum): # No Comments provided in original file
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TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO0 = 0,
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TCAN4x5x_GFC_ACCEPT_INTO_RXFIFO1 = 1,
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TCAN4x5x_GFC_REJECT = 2
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class TCAN4x5x_MRAM_Element_Data_Size(Enum):
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# 8 bytes of data payload
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MRAM_8_Byte_Data = 0,
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@ -103,6 +140,7 @@ class TCAN4x5x_MRAM_Element_Data_Size(Enum):
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# 64 bytes of data payload
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MRAM_64_Byte_Data = 0x7
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class TCAN4x5x_MCAN_Data_Timing_Simple(ctypes.Structure):
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_fields_ = [
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# Prescaler value, interpreted as 1:x
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@ -118,6 +156,7 @@ class TCAN4x5x_MCAN_Data_Timing_Simple(ctypes.Structure):
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("DataTqAfterSamplePoint", uint8_t, 5)
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]
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class TCAN4x5x_MCAN_Data_Timing_Raw(ctypes.Structure):
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_fields_ = [
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# DBRP: The prescaler value from the MCAN system clock. Interpreted by MCAN as the value is this field + 1
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@ -145,6 +184,7 @@ class TCAN4x5x_MCAN_Data_Timing_Raw(ctypes.Structure):
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("TDCFilter", uint8_t, 7)
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]
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class TCAN4x5x_MCAN_Nominal_Timing_Simple(ctypes.Structure):
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_fields_ = [
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# NBRP: The prescaler value from the MCAN system clock. Value interpreted as 1:x
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@ -160,6 +200,7 @@ class TCAN4x5x_MCAN_Nominal_Timing_Simple(ctypes.Structure):
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("NominalTqAfterSamplePoint", uint8_t, 8)
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]
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class TCAN4x5x_MCAN_Nominal_Timing_Raw(ctypes.Structure):
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_fields_ = [
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# NBRP: The prescaler value from the MCAN system clock. Interpreted by MCAN as the value is this field + 1
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@ -179,6 +220,7 @@ class TCAN4x5x_MCAN_Nominal_Timing_Raw(ctypes.Structure):
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("NominalSyncJumpWidth", uint8_t, 7)
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]
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class TCAN4x5x_MRAM_Config(ctypes.Structure):
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_fields_ = [
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# ************************
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@ -232,10 +274,9 @@ class TCAN4x5x_MRAM_Config(ctypes.Structure):
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# TX Buffers element size: The number of bytes for the TX Buffers (data payload)
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("TxBufferElementSize", TCAN4x5x_MRAM_Element_Data_Size, 3)
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]
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class TCAN4x5x_MCAN_Interrupt_Enable_bits(ctypes.Structure):
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_fields_ = [
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# IE[0] RF0NE: Rx FIFO 0 new message
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@ -332,10 +373,12 @@ class TCAN4x5x_MCAN_Interrupt_Enable_bits(ctypes.Structure):
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("reserved", uint8_t, 2)
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]
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class TCAN4x5x_MCAN_Interrupt_Enable(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_MCAN_Interrupt_Enable_bits),
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("word", uint32_t)]
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class TCAN4x5x_MCAN_Interrupts_bits(ctypes.Structure):
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_fields_ = [
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# IR[0] RF0N: Rx FIFO 0 new message
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@ -432,10 +475,12 @@ class TCAN4x5x_MCAN_Interrupts_bits(ctypes.Structure):
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("reserved", uint8_t, 1)
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]
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class TCAN4x5x_MCAN_Interrupts(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_MCAN_Interrupts_bits),
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("words", uint32_t)]
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class TCAN4x5x_MCAN_RX_Header(ctypes.Structure):
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_fields_ = [
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# CAN ID received
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@ -472,6 +517,7 @@ class TCAN4x5x_MCAN_RX_Header(ctypes.Structure):
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("ANMF", uint8_t, 1)
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]
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class TCAN4x5x_Device_Interrupts_bits(ctypes.Structure):
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_fields_ = {
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# DEV_IR[0] VTWD: Global Voltage, Temp, or Watchdog (if equipped) Interrupt
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@ -571,6 +617,7 @@ class TCAN4x5x_Device_Interrupts_bits(ctypes.Structure):
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("CANBUSNORM", uint8_t, 1)
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}
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class TCAN4x5x_Device_Interrupts(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_Device_Interrupts_bits),
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("word", uint32_t)]
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@ -625,12 +672,12 @@ class TCAN4x5x_MCAN_CCCR_Config_bits(ctypes.Structure):
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("NISO", uint8_t, 1)
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]
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class TCAN4x5x_MCAN_CCCR_Config(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_MCAN_CCCR_Config_bits),
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("word", uint32_t)]
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class TCAN4x5x_MCAN_Global_Filter_Configuration_bits(ctypes.Structure):
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_fields_ = [
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# GFC[0] : Reject Remote Frames for Extended IDs
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@ -656,6 +703,8 @@ class TCAN4x5x_MCAN_Global_Filter_Configuration_bits(ctypes.Structure):
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# Reserved
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("reserved", uint32_t, 26)
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]
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class TCAN4x5x_MCAN_Global_Filter_Configuration(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_MCAN_Global_Filter_Configuration_bits),
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("word", uint32_t)]
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@ -739,6 +788,7 @@ class TCAN4x5x_device_interrupt_enable_bits(ctypes.BigEndianStructure):
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("CANBUSNORMEN", uint8_t, 1)
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]
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class TCAN4x5x_device_interrupt_enable(ctypes.Union):
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_fields_ = [("b", TCAN4x5x_device_interrupt_enable_bits),
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("word", uint32_t)]
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